; CPDispMRT.mu -- MRT modified to run on CommProc-based Alto Gateway ; and to accompany rewritten display microcode (GateDisplay.mu) ; Last modified September 15, 1978 5:50 PM ; **** Memory Refresh task **** ; This is the MRT for Alto IIs with Extended Memory (16K chips). ; It is modified to abolish the Interval Timer and eliminate CLOCKTEMP, and ; do away with cursor processing (now done by the cursor task itself). ; (Actually, there is nothing about this MRT that has anything directly to ; do with the CommProc, but it is named CPMRT to distinguish it from ; EIAMRT, which is specialized to the EIA board.) !17,20,TX0,TX6,TX3,TX2,TX8,TX5,TX1,TX7,TX4,,,,,,,; !1,2,NOCLK,CLOCK; $MTEMP $R25; $R37 $R37; $REFIIMSK $7777; ; This version assumes MRTACT is cleared by BLOCK, not MAR_ R37 ; R37 [4-13] are the low bits of the TOD clock ; R37 [8-14] are the refresh address bits ; Each time MRT runs, four refresh addresses are generated, though ; R37 is incremented only once. Sprinkled throughout the execution ; of this code are the following operations having to do with refresh: ; MAR_ R37 ; R37_ R37 +4 NOTE THAT R37 [14] DOES NOT CHANGE ; MAR_ R37 XOR 2 TOGGLES BIT 14 ; MAR_ R37 XOR 200 TOGGLES BIT 8 ; MAR_ R37 XOR 202 TOGGLES BITS 8 AND 14 MRT: MAR_ R37; **FIRST REFRESH CYCLE** SINK_ MOUSE, BUS; MOUSE DATA IS ANDED WITH 17B MRTA: L_ T_ -2, :TX0; DISPATCH ON MOUSE CHANGE TX0: T_ R37; INCREMENT CLOCK T_ 3+T+1; IE. T_ T +4. L_ REFIIMSK AND T; ZERO HIGH 4 BITS R37_ L; STORE UPDATED CLOCK T_ 2; NO STATE AT THIS POINT IN PUBLIC REGS MAR_ R37 XOR T,T_ R37; **SECOND REFRESH CYCLE** L_ REFZERO AND T; ONLY THE CLOKCK BITS, PLEASE SH=0, TASK; TEST FOR CLOCK OVERFLOW :NOCLK; [NOCLK,CLOCK] NOCLK: T _ 200; MAR_ R37 XOR T; **THIRD FEFRESH CYCLE** T_ 2 OR T, BLOCK; CLEARS WAKEUP REQUEST FF MAR_ R37 XOR T; **FOURTH REFRESH CYCLE** TASK; :MRT; END OF MAIN LOOP ; Memory Refresh Task (cont'd) CLOCK: MAR_ CLOCKLOC; R37 OVERFLOWED. NOP; L_ MD+1; INCREMENT CLOCK IM MEMORY MAR_ CLOCKLOC; MTEMP_ L, TASK; MD_ MTEMP, :NOCLK; ;AFTER THIS DISPATCH, T WILL CONTAIN XCHANGE, L WILL CONTAIN YCHANGE-1 TX1: L_ T_ ONE +T, :M00; Y=0, X=1 TX2: L_ T_ ALLONES, :M00; Y=0, X=-1 TX3: L_ T_ 0, :M00; Y=1, X=0 TX4: L_ T_ ONE AND T, :M00; Y=1, X=1 TX5: L_ T_ ALLONES XOR T, :M00; Y=1, X=-1 TX6: T_ 0, :M00; Y=-1, X=0 TX7: T_ ONE, :M00; Y=-1, X=1 TX8: T_ ALLONES, :M00; Y=-1, X=-1 M00: MAR_ MOUSELOC; START THE FETCH OF THE COORDINATES MTEMP_ L; YCHANGE -1 L_ MD+ T; X+ XCHANGE T_ MD; Y T_ MTEMP+ T+1; Y+ (YCHANGE-1) + 1 MTEMP_ L, L_ T; T_ R37; Save R37 for use as temp MAR_ MOUSELOC; NOW RESTORE THE UPDATED COORDINATES R37_ L, L_ T; MD_ MTEMP; MD_ R37; R37_ L, :MRTA; Restore R37