; IfsMc.mu -- main microcode source for IFS ; Copyright Xerox Corporation 1979, 1980, 1981 ; Last modified May 3, 1981 4:19 PM by Taft ; Last modified by Taft, March 3, 1980 11:18 AM ; - change DoubleBlt to IfsXMOps ; Last modified by Butterfield, February 20, 1980 9:22 PM ; - add predef of TRAP1 - 2/20/80 ; - include XGetFrame.mu - 8/21 ; - exchange GetFrame and BcplUtil includes - 8/20 ; - include XDoubleBlt.mu - 8/17 ; - include XIfsRamTrap.mu - 8/2 ; - include XBcplUtil.mu - 8/1/79 ; Last modified June 29, 1978 10:19 AM ; General comment: this microcode is intended to be used on both XM ; and non-XM machines. If XM is not present then IFS initialization ; turns all the XMAR_s into MAR_s before loading the RAM. %0, 1777, 37, TRAP1; TriConMc no longer does this for us ; Following extracted from TriConMc.mu: #AltoConsts23.mu; Get from [Maxc1]AltoConsts23.mu ; Predefinitions for task starting locations and emulator-level ; subroutine entry points. %0, 1777, 0, EXITRAM; Emulator task start %0, 1777, 3, LOC3; Write task start %0, 1777, 16, LOC16; (See below) %0, 1777, 17, LOC17; Read task start %0, 1777, 20, START; (See below) %0, 1777, 21, LOC21; ModShift subroutine for ECC correction %0, 1777, 22, LOC22; SetBLV subroutine ; There is a hack in the read microcode that causes the reset location ; for task 16 to be used. This means that it is not possible to run ; task 16 (= Diablo disk word task) in the Ram. ; Lock out the Ram Utility Area ; (labels are attached to instructions in IfsXEmulator.mu) %7, 1777, 774, RU774, RU775, RU776, RU777, RU1000, RU1001, RU1002, RU1003; ;***THIS INSTRUCTION WILL CAUSE THE BOOT-LOCUS-VECTOR TO BE ;*** SET TO THE VALUE IN AC0 AT THE NEXT BOOT $AC0 $R3; LOC22: RMR_AC0,:EXITRAM; ;***THIS CODE IS CAREFULL PLACED IN THE RAM ;***FOR AN EMULATOR "NO-OP BOOT". ;***THE LSB OF THE BOOT-LOCUS-VECTOR MUST BE 0 FOR THIS TO WORK ; EXITRAM: SWMODE; GO TO LOCATION 20 IN THE RAM, AND THEN START: :START; RETURN TO LOCATION 20 IN THE ROM #TriConBody.Mu; The body of the Trident controller microcode ; Stuff lifted from EmulatorDefs.mu: ; Standard R-registers usable by the emulator task $AC3 $R0; Accumulators $AC2 $R1; $AC1 $R2; $AC0 $R3; $NWW $R4; New wakeups waiting (communication between tasks) $SAD $R5; Temporary private to emulator $PC $R6; Program Counter for emulated Nova $XREG $R7; Temporary private to emulator. ; Contains instruction LCY 8 upon dispatch to TRAP1. $XH $R10; Temporary private to emulator $MTEMP $R25; Temporary usable by any task $DWAX $R35; Temporary private to emulator $MASK $R36; Temporary private to emulator $LREG $R40; Another name for the M-register #IfsRamTrap.mu; #IfsBcplUtil.mu; #IfsXEmulator.mu; #IfsGetFrame.mu; #IfsPupChecksum.mu; #IfsXMOps.mu; ; R-registers for use by VMem microcode $mapbase $R15; $mapsptr $R16; $mapmask1 $R17; #VMem.mu; ; Instruction to initialize the VMem microcode ; Requires the following arguments: ; AC0: base of hash table ; AC1: size of hash table in words ; AC3: base of map statistics buffer (0 => none) InitVMem: L_AC0; mapbase_L, T_0+1; L_AC1-T-1, TASK; VMem wants size-2 mapmask1_L; L_AC3, SWMODE; mapsptr_L, :START;