AU ;File=DDTape-Rev-B.sil Rev=B Date=1/28/81 Reference MARKED BUILT ;File=DDTape01.sil Rev=B Date=12/18/80 Page=02 MARKED BUILT ;File=DDTape02.sil Rev=B Date=12/18/80 Page=03 MARKED BUILT ;File=DDTape03.sil Rev=B Date=12/18/80 Page=04 MARKED BUILT ;File=DDTape04.sil Rev=B Date=12/09/80 Page=05 MARKED BUILT ;File=DDTape05.sil Rev=B Date=12/09/80 Page=06 MARKED BUILT ;File=DDTape06.sil Rev=B Date=12/18/80 Page=07 MARKED BUILT ;File=DDTape07.sil Rev=B Date=12/18/80 Page=08 MARKED BUILT ;File=DDTape08.sil Rev=B Date=12/18/80 Page=09 MARKED BUILT ;File=DDTape09.sil Rev=B Date=12/16/80 Page=10 MARKED BUILT ;File=DDTape10.sil Rev=B Date=1/28/81 Page=11 MARKED BUILT ;File=DDTape11.sil Rev=B Date=12/18/80 Page=12 MARKED BUILT ;File=DDTape12.sil Rev=B Date=12/09/80 Page=13 MARKED BUILT ;File=DDTape13.sil Rev=B Date=12/09/80 Page=14 MARKED BUILT ;File=DDTape14.sil Rev=B Date=1/28/81 Page=15 Reference MARKED BUILT ; Implicitly generated wiring ... @ CALIBRATE: <1> ; INSTALL welder nose, board Component side up ... E61 {12,0} C122 {12,396} C62 {252,396} E1 {252,0} UNPLUG: <2> #aa17.1i {204,72} #aa26.1o {168,72} #aa8.1i {240,72} #cc53.1i {60,48} #ee9.1i {236,24} #w19.1i {196,120} CALIBRATE: <3> ; INSTALL welder nose, board Wiring side up ... C122 {12,0} E61 {12,396} E1 {252,396} C62 {252,0} DELETE: <4> ; DDTape10.sil+11 #aa17.11o {184,336} #w19.2i {192,276} DELETE: <5> ; TapeActive' #cc53.3o {52,348} #aa26.3i {160,324} #aa17.5i {188,324} #aa8.5i {224,324} DELETE: <6> ; TReadF1' #ee9.12i {228,384} #aa17.15o {200,336} CALIBRATE: <7> ; INSTALL welder nose, board Wiring side up ... C122 {12,0} E61 {12,396} E1 {252,396} C62 {252,0} DDTape10.sil+13: <9> (84) #aa8.14o {232,336} #w19.2i {192,276} TapeActive': <8> (261) #cc53.3o {52,348} #aa26.3i {160,324} #aa17.5i {188,324} #aa8.5i {224,324} E15 {196,396} TReadF1': <10> (92) #ee9.12i {228,384} #aa17.11o {184,336}