; The following predefinitions are for the Intel 8748
;C. Wallace
;modified July 25, 1978 11:10 AM

.rdx 16

; Opcode classes are as follows:

;@noparclass No parameters class, 1 byte
;@immclass Immediate class, 2 bytes, parameter is an 8 bit constant
;@pageclass Same page class, 2 bytes, parameter is an address in the
; current page.
;@regclass Register class, 1 byte, parameter is register no. (0-7)
;@indirclass Indirect class, 1 byte, parameter is register no. (0,1)
;@jmpclass Jump class, 2 bytes, parameter is an 11 bit address
;@immregclass Immediate register class, 2 bytes, first parameter is the
; register number, the second parameter is an 8 bit constant
;@immindirclass Immediate indirect class, 2 bytes, first parameter is the
; register (0,1), the second parameter is an 8 bit constant
;@regjmpclass Register jump class, 2 bytes, first parameter is the register
; number, the second parameter is an address in the current
; page


; Notes on the mneumonics:
;These generally follow Intel’s. The immediate and
;indirect indications have been moved from the operand fields to the op
;code mneumonics. Within the mneumonic "i" usually means immediate. "@"
;means indirect via R0 or R1. @a means indirect via the accumulator. If no
;destination appears in the mneumomic, theaccumulator is implied (ADD, OR,
;AND, XOR, IN). The accumulator is the source for OUT instructions. In
;instructions containing both a source and a destination, the order is operation,
;destination, source.

;ADD to accumulator (C and AC are affected)

.def addi @immclass 003;Add immediate data to A.
.def addr @regclass 068;Add register data to A.
.def add@ @indirclass 06;Add data in RAM location addressed by Rr to A.
.def addci @immclass 013;Add C and immediate data to A.
.def addcr @regclass 078;Add C and register data to A.
.def addc@ @indirclass 070;Add C and data in RAM location addressed by Rr ;to A.

;AND to accumulator
.def andi @immclass 053;AND A data with immediate mask.
.def andr @regclass 058;AND A data with mask in Rr.
.def and@ @indirclass 050;AND A data with mask in RAM addressed by
;Rr.

;AND to bus and ports
.def andbi @immclass 098;AND BUS data with immediate mask.
.def andp1i @immclass 099;AND port 1 data with immediate mask.
.def andp2i @immclass 09a;AND port 2 data with immediate mask.
.def andp4 @noparclass 09c;AND port 4 data with mask in A bits 0-3.
.def andp5 @noparclass 09d;AND port 5 data with mask in A bits 0-3.
.def andp6 @noparclass 09e;AND port 6 data with mask in A bits 0-3.
.def andp7 @noparclass 09f;AND port 7 data with mask in A bits 0-3.

;Call subroutine
.def call @jmpclass 014;Store PC and PSW bits 4-7 in stack. Increment
;stack pointer. Jump to address.

;Clear location
.def clra @noparclass 027;Clear A to zero.
.def clrc @noparclass 097;Clear C to zero.
.def clrf0 @noparclass 085;Clear F0 to zero.
.def clrf1 @noparclass 0a5;Clear F1 to zero.

;Complement location
.def cpla @noparclass 037;One’s complement A contents.
.def cplc @noparclass 0a7;Complement C.
.def cplf0 @noparclass 095;Complement F0.
.def cplf1 @noparclass 0b5;Complement F1.

;Decimal adjust to A (C is affected)
.def daa @noparclass 057;A contents adjusted to form 2 BCD digits.

;Decrement
.def deca @noparclass 007;Decrement A by 1.
.def decr @regclass 0c8;Decrement Rr by 1.
.def djnz @regjmpclass 0e8;Decrement Rr by 1. If Rr NOT 0, jump to addr.

;Disable interrupt
.def disi @noparclass 015;Disable external interrupt..
.def distcnti @noparclass 035;Disable timer/counter interrupt.

;Enable interrupt
.def eni @noparclass 005;Enable external interrupt.
.def entcnti @noparclass 025;Enable timer/counter interrupt.
.def ent0clk @noparclass 075;Enable T0 as internal oscillator output..
;Input
.def inbus @noparclass 008;Read BUS with RD strobe and input to A.
.def inp1 @noparclass 009;Input port 1 data to A.
.def inp2 @noparclass 00a;Input port 2 data to A.

;Increment
.def inca @noparclass 017;Increment A by 1.
.def incr @regclass 018;Increment Rr by 1.
.def inc@ @indirclass 010;Increment RAM location addressed by Rr by 1.

;Jump if bit in A is 1
.def jb0 @pageclass 012;Jump to addr if bit 0 of A is 1.
.def jb1 @pageclass 032;Jump to addr if bit 1 of A is 1.
.def jb2 @pageclass 052;Jump to addr if bit 2 of A is 1.
.def jb3 @pageclass 072;Jump to addr if bit 3 of A is 1.
.def jb4 @pageclass 092;Jump to addr if bit 4 of A is 1.
.def jb5 @pageclass 0b2;Jump to addr if bit 5 of A is 1.
.def jb6 @pageclass 0d2;Jump to addr if bit 6 of A is 1.
.def jb7 @pageclass 0f2;Jump to addr if bit 7 of A is 1.

;Jump on flag
.def jnc @pageclass 0e6;Jump to addr if C=0.
.def jc @pageclass 0f6;Jump to addr if C=1.
.def jf0 @pageclass 0b6;Jump to addr if F0=1.
.def jf1 @pageclass 076;Jump to addr if F1=1.

;Jump on input
.def jni @pageclass 086;Jump to addr if interrupt input is low (I=0).
.def jnt0 @pageclass 026;Jump to addr if T0=0.
.def jt0 @pageclass 036;Jump to addr if T0=1.
.def jnt1 @pageclass 046;Jump to addr if T1=0.
.def jt1 @pageclass 056;Jump to addr if T1=1.

;Jump - Other
.def jmp @jmpclass 004;Jump to addr unconditionally.
.def jmpp@a @noparclass 0b3;The contents of the memory location pointed to
;by A are substituted for PC bits 0-7.
.def jz @pageclass 0c6;Jump to addr if A contents are zero.
.def jnz @pageclass 096;Jump to addr if A contents are not zero.
.def jtf @pageclass 016;Jump to addr if TF=1. Sets TF=0.

;Move to A
.def mar @regclass 0f8;Move data in Rr into A.
.def mapsw @noparclass 0c7;Move PSW data into A.
.def ma@ @indirclass 0f0;Move data in RAM location addressed by Rr into A.
.def mat @noparclass 042;Move data in timer into A.

;Move from A
.def mra @regclass 0a8;Move data in A into Rr.
.def mpswa @noparclass 0d7;Move data in A into PSW.
.def m@a @indirclass 0a0;Move data in A into RAM location addressed Rr.
.def mta @noparclass 062;Move data in A into timer.

;Move from program memory
.def mai @immclass 023;Move immediate data into A.
.def mri @immregclass 0b8;Move immediate data into Rr.
.def m@i @immindirclass 0b0;Move immediate data into RAM location
;addressedby Rr.

;Move - Input/Output ports
.def map4 @noparclass 00c;Move data in 8243 port 4 into A bits 0-3.
;Zero A bits 4-7.
.def map5 @noparclass 00d;Move data in 8243 port 5 into A bits 0-3.
;Zero A bits 4-7.
.def map6 @noparclass 00e;Move data in 8243 port 6 into A bits 0-3.
;Zero A bits 4-7.
.def map7 @noparclass 00f;Move data in 8243 port 7 into A bits 0-3.
;Zero A bits 4-7.
.def mp4a @noparclass 03c;Move data in A into 8243 port 4.
.def mp5a @noparclass 03d;Move data in A into 8243 port 5.
.def mp6a @noparclass 03e;Move data in A into 8243 port 6.
.def mp7a @noparclass 03f;Move data in A into 8243 port 7.

;Move - Program memory
.def ma@a @noparclass 0a3;Move data in program memory location addressed ;by A into A. PC is restored.
.def map3@a @noparclass 0e3;Move data in progr. mem. page 3 location
;addressed by A into A. PC is restored.

;Move - External RAM
.def max@ @indirclass 080;Move data in RAM location addresed by Rr into A.
.def mxa@ @indirclass 090;Move data in A into RAM location addresed by Rr.

;No op
.def nop @noparclass 000;No operation.

;OR to accumulator
.def ori @immclass 043;OR contents of A with data mask.
.def orr @regclass 048;OR contents of A with Rr mask.
.def or@ @indirclass 040;OR data in A with mask in RAM location ;addressed by Rr.


;OR to bus and ports
.def orbi @immclass 088;OR contents of BUS with data mask.
.def orp1i @immclass 089;OR contents of port 1 with data mask.
.def orp2i @immclass 08a;OR contents of port 2 with data mask.
.def orp4 @noparclass 08c;OR data in 8243 port 4 with mask in A bits 0-3.
.def orp5 @noparclass 08d;OR data in 8243 port 5 with mask in A bits 0-3.
.def orp6 @noparclass 08e;OR data in 8243 port 6 with mask in A bits 0-3.
.def orp7 @noparclass 08f;OR data in 8243 port 7 with mask in A bits 0-3.

;Output
.def outbus @noparclass 002;Output data in A to BUS and latch.
.def outp1 @noparclass 039;Output data in A to port 1 and latch.
.def outp2 @noparclass 03a;Output data in A to port 2 and latch.

;Return from subroutine
.def ret @noparclass 083;Restore program counter from stack and return to ;main routine.
.def retr @noparclass 093;Restore PC and PSW bits 4-7 from stack and
;return. Reenable interrupt.

;Rotate
.def rla @noparclass 0e7;Rotate A left. C is unaffected.
.def rlca @noparclass 0f7;Rotate A left, through C.
.def rra @noparclass 077;Rotate A right. C is unaffected.
.def rrca @noparclass 067;Rotate A right, through C.

;Select memory bank
.def selmb0 @noparclass 0e5;Select program memory bank 0.
.def selmb1 @noparclass 0f5;Select program memory bank 1.


;Select register bank
.def selrb0 @noparclass 0c5;Select working register bank 0.
.def selrb1 @noparclass 0d5;Select working register bank 1.


;Timer and event counter
.def stoptcnt @noparclass 065;Stop timer or disable event counter.
.def strtcnt @noparclass 045;Enable T1 as event counter input and start.
.def strtt @noparclass 055;Clear timer prescaler and start timer.

;Swap nibbles in A
.def swapa @noparclass 047;Swap A bits 0-3 with A bits 4-7.

;Exchange data
.def xchar @regclass 028;Exchange contents of A and Rr.
.def xcha@ @indirclass 020;Exchange contents of A and resident RAM ; locationaddressed by Rr.
.def xchda@ @indirclass 030;Exchange A bits 0-3 with bits 0-3 of resident RAM ;location addressed by Rr.

;Exclusive OR
.def xori @immclass 0d3;XOR contents of A with data mask.
.def xorr @regclass 0d8;XOR data in A with mask in Rr.
.def xor@ @indirclass 0d0;XOR data in A with mask in resident RAM location ;addressed by Rr.
;