; The following predefinitions are for the Xerox ADM ; They must be used with the special opcode routine ; file "ADMOpCode.br". The command line to BCA should ; be of the form: BCA/switches ADMOpCode.br/c YourCode.bca ; ; Glen WIlliams <GWilliams.PA> ; created 12 Aug. 1982 11:53 am PDT (Thursday) ; ;#Pg0Addr = 0 I don't know what these three do ;#HighAddrByte = 1 ;#LowAddrByte = 2 .rdx 16 @OPTOFFSET = -8 @HIORDFIRST = 1 ; There are several classes into which you can put ; opcodes: ; NoParClass //No operand required (aka INHERENT) ; PgZClass //Page zero, + 1 byte addr <256 (aka DIRECT, INDEXED) ; ImmClass //Immediate, followed by LoOperand, HiOperand. ; PCRelClass //Program counter relative ; ExtClass //Extended address followed by HiByte, LoByte. ; OptClass //Assembler decides between pgz and ext. ; TwoOnlyClass//Always 2 bytes. ; TwoDClass //. ; TwoDimClass //. ; TwoNNClass //. ; ThreeXClass //. ; ThreeYClass //. ; I40DClass //. ; I40DDClass //. ; I40DAClass //. ; I40AClass //. ; LccIOClass //. ; LccCompareAndJumpClass //. ; LccNoOp2Class //. ; Lcc3BitOpClass //. ;ADMmpmOp .def jmp @40aclass 000x .def cal @40aclass 010x .def bt @40daclass 020x .def jcc @40daclass 020x if=8 pf=9 ci=0a z=0b nz=0c n=0d c=0e nc=0f .def mpm @ADMmpmOp 090x; new today!!, compiles to [FF 90+arg] .def movrs @ADMmpmOp 0E0x; move r to status register .def ijnz @40daclass 030x .def lcj @lcccompareandjumpclass 040x .def mvi @40ddclass 050x .def inp @lccioopclass 060x; inp and out discriminate on the register address .def inpt @pgzclass 0FEx; inp and out discriminate on the register address .def out @lccioopclass 060x .def outt @pgzclass 0FAx .def Lpi @Lcc3BitOpClass 070x .def dim @40dclass 070x .def movr @40dclass 080x .def movt @40dclass 090x .def add @40dclass 0a0x .def and @40dclass 0b0x .def ior @40dclass 0c0x .def cmp @40dclass 0d0x .def clb @lcc3bitopclass 0e0x .def stb @lcc3bitopclass 0e8x .def cli @noparclass 0f0x .def movdt @immclass 0f1x .def rfs @noparclass 0f2x .def neg @noparclass 0f3x .def jit @noparclass 0f4x .def movst @noparclass 0f5x .def mvit @immclass 0f6x .def rss @noparclass 0f7x .def sti @noparclass 0f8x ;;; .def stp @noparclass 0f9x ;;; .def nop2 @lccnoop2class 0fax .def clr @noparclass 0fbx .def rfi @noparclass 0fcx .def cpl @noparclass 0fdx .def nop3 @noparclass 0ffx